PulsePins development
This page documents some of the development practices and standards followed in the project.
Coding standards
Use structured, clear code. Prefer uniform and self-describing variable names. Add inline documentation where it helps. Comments should explain intent. Avoid hard-coded parameters. Keep tests broad enough to cover corner cases.
TO DO list symbols
The following symbols are used in project TODO lists:
!important, high-impact item@complex task, might be time consuming or technically demandingorecurring tasks, to be performed periodically (keep them on the list)#major milestones, enabler for other tasks-easy taskxlow-impact, low-priority
Source code layout
ip/- Verilog descriptions of circuitryip/combiner/- IP for the advanced multiplexerip/combiner_comb/- combinational version of the advanced multiplexerip/combiner_trig/- trigger-signal multiplexerip/counter/- event counters and test/measurement logicip/freq_meter/- frequency-meter coreip/misc/- small reusable support blocksip/st_mux/- Avalon-ST multiplexer, implemented inst_mux_if.svip/streamer/- IP for the run-length decoder engineip/rl_encoder_if/- IP for the run-length encoder engineip/ts_core/- IP for timestamp capture / time taggingc++/- C++ source code for API, pptoolpython/- Python binding
Documentation
These manual pages are built with MkDocs, using macros plugin. For testing the generated web site, we use caddy.
Useful starting points for the codebase:
build.md- hardware/software build and deployment flowclock_domain.md- detailed clocking, CDC, and timing-constraint referencecpp.md- C++ API overviewcombiner.md- output and trigger combiner architecturecounter.md- integrated measurement/counter subsystemtimestamp.md- timestamp capture pathfreq_meter.md- frequency-meter block and APIst_mux.md- Avalon-ST multiplexer helpermisc_ip.md- reusable support RTL blocks